Skip to content

Instrument

Progress on the digital-to-time converter research

Our research paper High precision low jitter pulse generator implemented with FPGA transceiver has been published on the journal of Measurement. The link is 10.1016/j.measurement.2024.114657.

In this paper, a new method for DTC design based on the FPGA transceiver is proposed and demonstrated. High precision about 1 picosecond is achieved. The jitter is obviously much lower compared to other FPGA based design.

This work was supported in part by the National Natural Science Foundation of China (Grant No. 12375189), and in part by the National Key Research and Development Program of China (Grant No. 2022YFA1604703). Meanwhile, this new method has been authorize a patent of invention in China.

我们的研究工作在 Measurement 期刊上发表。该论文中，一种新型基于FPGA高速收发器的数字时钟转换器（DTC）设计方法被提出并得到部署与验证。该方案达到了皮秒左右的高分辨，且其晃动明显低于其他基于FPGA的设计。

该工作得到了国家自然科学基金项目（基金号12375189）与国家重点研发计划课题（基金号2022YFA1604703）的支持。同时，基于该新方法的中国发明专利已经得到授权。

Progress on the FPGA based phase measurement system

Our research paper A high precision phase measurement system implemented in FPGA with phase interpolator has been published on the journal of Review of Scientific Instruments. The link is 10.1063/5.0078340.

In this work, the phase interpolator in Xilinx transceiver is used to generate a slight frequency difference for the DDMTD. The accuracy is guarrantted partly by the high quality integrated dedicated PLL inside the transceiver. An averaging measurement method is used to improve the linearity. Results are reported in this paper.

In 2024, this new method and system has been authorize a patent of invention in China.

我们的研究工作在 Review of Scientific Instruments 发表。该论文介绍了基于Xilinx FPGA高速收发器内部相位内插模块产生微小频率差从而实现DDMTD的方法。收发器内部高质量的PLL能有效提升系统测量精度。此外，本文提出了一种通过可控平均测量来消除内插模块的非线性的方法。

基于该新方法及系统设计的中国发明专利已经在2024年得到授权。